696 lines
21 KiB
C
696 lines
21 KiB
C
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/*++
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Copyright (c) Microsoft Corporation. All rights reserved.
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Module Name:
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ata.h
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Abstract:
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Defines the structures used by ATA port and the miniport drivers.
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Authors:
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Revision History:
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--*/
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#ifndef _NTATA_
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#define _NTATA_
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#if _MSC_VER >= 1200
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#pragma warning(push)
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#endif
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#pragma warning(disable:4214) // bit field types other than int
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//
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// IDENTIFY device data (response to 0xEC)
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//
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#pragma pack(push, id_device_data, 1)
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typedef struct _IDENTIFY_DEVICE_DATA {
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struct {
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USHORT Reserved1 : 1;
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USHORT Retired3 : 1;
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USHORT ResponseIncomplete : 1;
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USHORT Retired2 : 3;
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USHORT FixedDevice : 1;
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USHORT RemovableMedia : 1;
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USHORT Retired1 : 7;
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USHORT DeviceType : 1;
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} GeneralConfiguration; // word 0
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USHORT NumCylinders; // word 1
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USHORT ReservedWord2;
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USHORT NumHeads; // word 3
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USHORT Retired1[2];
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USHORT NumSectorsPerTrack; // word 6
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USHORT VendorUnique1[3];
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UCHAR SerialNumber[20]; // word 10-19
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USHORT Retired2[2];
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USHORT Obsolete1;
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UCHAR FirmwareRevision[8]; // word 23-26
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UCHAR ModelNumber[40]; // word 27-46
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UCHAR MaximumBlockTransfer; // word 47
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UCHAR VendorUnique2;
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USHORT ReservedWord48;
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struct {
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UCHAR ReservedByte49;
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UCHAR DmaSupported : 1;
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UCHAR LbaSupported : 1;
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UCHAR IordyDisable : 1;
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UCHAR IordySupported : 1;
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UCHAR Reserved1 : 1;
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UCHAR StandybyTimerSupport : 1;
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UCHAR Reserved2 : 2;
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USHORT ReservedWord50;
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}Capabilities; // word 49-50
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USHORT ObsoleteWords51[2];
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USHORT TranslationFieldsValid:3; // word 53
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USHORT Reserved3:13;
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USHORT NumberOfCurrentCylinders; // word 54
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USHORT NumberOfCurrentHeads; // word 55
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USHORT CurrentSectorsPerTrack; // word 56
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ULONG CurrentSectorCapacity; // word 57
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UCHAR CurrentMultiSectorSetting; // word 58
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UCHAR MultiSectorSettingValid : 1;
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UCHAR ReservedByte59 : 7;
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ULONG UserAddressableSectors; // word 60-61
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USHORT ObsoleteWord62;
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USHORT MultiWordDMASupport : 8; // word 63
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USHORT MultiWordDMAActive : 8;
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USHORT AdvancedPIOModes : 8;
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USHORT ReservedByte64 : 8;
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USHORT MinimumMWXferCycleTime;
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USHORT RecommendedMWXferCycleTime;
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USHORT MinimumPIOCycleTime;
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USHORT MinimumPIOCycleTimeIORDY;
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USHORT ReservedWords69[6];
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USHORT QueueDepth : 5;
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USHORT ReservedWord75 : 11;
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USHORT ReservedWords76[4];
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USHORT MajorRevision;
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USHORT MinorRevision;
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struct {
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//
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// Word 82
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//
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USHORT SmartCommands : 1;
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USHORT SecurityMode : 1;
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USHORT RemovableMediaFeature : 1;
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USHORT PowerManagement : 1;
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USHORT Reserved1 : 1;
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USHORT WriteCache : 1;
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USHORT LookAhead : 1;
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USHORT ReleaseInterrupt : 1;
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USHORT ServiceInterrupt : 1;
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USHORT DeviceReset : 1;
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USHORT HostProtectedArea : 1;
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USHORT Obsolete1 : 1;
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USHORT WriteBuffer : 1;
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USHORT ReadBuffer : 1;
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USHORT Nop : 1;
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USHORT Obsolete2 : 1;
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//
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// Word 83
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//
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USHORT DownloadMicrocode : 1;
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USHORT DmaQueued : 1;
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USHORT Cfa : 1;
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USHORT AdvancedPm : 1;
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USHORT Msn : 1;
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USHORT PowerUpInStandby : 1;
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USHORT ManualPowerUp : 1;
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USHORT Reserved2 : 1;
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USHORT SetMax : 1;
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USHORT Acoustics : 1;
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USHORT BigLba : 1;
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USHORT DeviceConfigOverlay : 1;
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USHORT FlushCache : 1;
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USHORT FlushCacheExt : 1;
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USHORT Resrved3 : 2;
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//
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// Word 84
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//
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USHORT SmartErrorLog : 1;
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USHORT SmartSelfTest : 1;
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USHORT MediaSerialNumber : 1;
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USHORT MediaCardPassThrough : 1;
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USHORT StreamingFeature : 1;
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USHORT GpLogging : 1;
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USHORT WriteFua : 1;
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USHORT WriteQueuedFua : 1;
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USHORT WWN64Bit : 1;
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USHORT URGReadStream : 1;
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USHORT URGWriteStream : 1;
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USHORT ReservedForTechReport : 2;
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USHORT IdleWithUnloadFeature : 1;
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USHORT Reserved4 : 2;
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}CommandSetSupport;
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struct {
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//
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// Word 85
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//
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USHORT SmartCommands : 1;
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USHORT SecurityMode : 1;
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USHORT RemovableMediaFeature : 1;
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USHORT PowerManagement : 1;
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USHORT Reserved1 : 1;
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USHORT WriteCache : 1;
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USHORT LookAhead : 1;
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USHORT ReleaseInterrupt : 1;
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USHORT ServiceInterrupt : 1;
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USHORT DeviceReset : 1;
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USHORT HostProtectedArea : 1;
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USHORT Obsolete1 : 1;
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USHORT WriteBuffer : 1;
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USHORT ReadBuffer : 1;
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USHORT Nop : 1;
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USHORT Obsolete2 : 1;
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//
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// Word 86
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//
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USHORT DownloadMicrocode : 1;
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USHORT DmaQueued : 1;
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USHORT Cfa : 1;
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USHORT AdvancedPm : 1;
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USHORT Msn : 1;
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USHORT PowerUpInStandby : 1;
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USHORT ManualPowerUp : 1;
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USHORT Reserved2 : 1;
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USHORT SetMax : 1;
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USHORT Acoustics : 1;
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USHORT BigLba : 1;
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USHORT DeviceConfigOverlay : 1;
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USHORT FlushCache : 1;
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USHORT FlushCacheExt : 1;
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USHORT Resrved3 : 2;
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//
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// Word 87
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//
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USHORT SmartErrorLog : 1;
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USHORT SmartSelfTest : 1;
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USHORT MediaSerialNumber : 1;
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USHORT MediaCardPassThrough : 1;
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USHORT StreamingFeature : 1;
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USHORT GpLogging : 1;
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USHORT WriteFua : 1;
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USHORT WriteQueuedFua : 1;
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USHORT WWN64Bit : 1;
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USHORT URGReadStream : 1;
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USHORT URGWriteStream : 1;
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USHORT ReservedForTechReport : 2;
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USHORT IdleWithUnloadFeature : 1;
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USHORT Reserved4 : 2;
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}CommandSetActive;
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USHORT UltraDMASupport : 8; // word 88
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USHORT UltraDMAActive : 8;
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USHORT ReservedWord89[4];
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USHORT HardwareResetResult;
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USHORT CurrentAcousticValue : 8;
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USHORT RecommendedAcousticValue : 8;
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USHORT ReservedWord95[5];
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ULONG Max48BitLBA[2]; // word 100-103
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USHORT StreamingTransferTime;
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USHORT ReservedWord105;
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struct {
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USHORT LogicalSectorsPerPhysicalSector : 4;
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USHORT Reserved0 : 8;
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USHORT LogicalSectorLongerThan256Words : 1;
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USHORT MultipleLogicalSectorsPerPhysicalSector : 1;
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USHORT Reserved1 : 2;
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} PhysicalLogicalSectorSize; // word 106
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USHORT InterSeekDelay; //word 107
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USHORT WorldWideName[4]; //words 108-111
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USHORT ReservedForWorldWideName128[4]; //words 112-115
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USHORT ReservedForTlcTechnicalReport; //word 116
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USHORT WordsPerLogicalSector[2]; //words 117-118
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struct {
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USHORT ReservedForDrqTechnicalReport : 1;
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USHORT WriteReadVerifySupported : 1;
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USHORT Reserved0 : 11;
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USHORT Reserved1 : 2;
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}CommandSetSupportExt; //word 119
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struct {
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USHORT ReservedForDrqTechnicalReport : 1;
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USHORT WriteReadVerifyEnabled : 1;
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USHORT Reserved0 : 11;
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USHORT Reserved1 : 2;
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}CommandSetActiveExt; //word 120
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USHORT ReservedForExpandedSupportandActive[6];
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USHORT MsnSupport : 2; //word 127
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USHORT ReservedWord127 : 14;
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struct { //word 128
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USHORT SecuritySupported : 1;
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USHORT SecurityEnabled : 1;
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USHORT SecurityLocked : 1;
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USHORT SecurityFrozen : 1;
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USHORT SecurityCountExpired : 1;
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USHORT EnhancedSecurityEraseSupported : 1;
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USHORT Reserved0 : 2;
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USHORT SecurityLevel : 1;
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USHORT Reserved1 : 7;
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} SecurityStatus;
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USHORT ReservedWord129[31];
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struct { //word 160
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USHORT MaximumCurrentInMA : 12;
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USHORT CfaPowerMode1Disabled : 1;
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USHORT CfaPowerMode1Required : 1;
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USHORT Reserved0 : 1;
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USHORT Word160Supported : 1;
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} CfaPowerMode1;
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USHORT ReservedForCfaWord161[8]; //Words 161-168
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struct { //Word 169
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USHORT SupportsTrim : 1;
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USHORT Reserved0 : 15;
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} DataSetManagementFeature;
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USHORT ReservedForCfaWord170[6]; //Words 170-175
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USHORT CurrentMediaSerialNumber[30]; //Words 176-205
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USHORT ReservedWord206; //Word 206
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USHORT ReservedWord207[2]; //Words 207-208
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struct { //Word 209
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USHORT AlignmentOfLogicalWithinPhysical: 14;
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USHORT Word209Supported: 1;
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USHORT Reserved0: 1;
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} BlockAlignment;
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USHORT WriteReadVerifySectorCountMode3Only[2]; //Words 210-211
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USHORT WriteReadVerifySectorCountMode2Only[2]; //Words 212-213
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struct {
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USHORT NVCachePowerModeEnabled: 1;
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USHORT Reserved0: 3;
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USHORT NVCacheFeatureSetEnabled: 1;
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USHORT Reserved1: 3;
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USHORT NVCachePowerModeVersion: 4;
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USHORT NVCacheFeatureSetVersion: 4;
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} NVCacheCapabilities; //Word 214
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USHORT NVCacheSizeLSW; //Word 215
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USHORT NVCacheSizeMSW; //Word 216
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USHORT NominalMediaRotationRate; //Word 217; value 0001h means non-rotating media.
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USHORT ReservedWord218; //Word 218
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struct {
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UCHAR NVCacheEstimatedTimeToSpinUpInSeconds;
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UCHAR Reserved;
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} NVCacheOptions; //Word 219
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USHORT ReservedWord220[35]; //Words 220-254
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USHORT Signature : 8; //Word 255
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USHORT CheckSum : 8;
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} IDENTIFY_DEVICE_DATA, *PIDENTIFY_DEVICE_DATA;
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#pragma pack (pop, id_device_data)
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//
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// identify packet data (response to 0xA1)
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//
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#pragma pack (push, id_packet_data, 1)
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typedef struct _IDENTIFY_PACKET_DATA {
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struct {
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USHORT PacketType : 2;
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USHORT Reserved1 : 3;
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USHORT DrqDelay : 2;
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USHORT RemovableMedia : 1;
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USHORT CommandPacketType : 5;
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USHORT Reserved2 : 1;
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USHORT DeviceType : 2;
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}GeneralConfiguration;
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USHORT ResevedWord1;
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USHORT UniqueConfiguration;
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USHORT ReservedWords3[7];
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USHORT SerialNumber[10];
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USHORT ReservedWords20[3];
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USHORT FirmwareRevision[4];
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USHORT ModelNumber[20];
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USHORT ReservedWords47[2];
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struct {
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USHORT VendorSpecific : 8;
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USHORT DmaSupported : 1;
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USHORT LbaSupported : 1;
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USHORT IordyDisabled : 1;
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USHORT IordySupported : 1;
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USHORT Obsolete : 1;
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USHORT OverlapSupported : 1;
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USHORT QueuedCommandsSupported : 1;
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USHORT InterleavedDmaSupported : 1;
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} Capabilities;
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USHORT ReservedWord50;
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USHORT ObsoleteWords51[2];
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USHORT TranslationFieldsValid:3;
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USHORT Reserved3:13;
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USHORT ReservedWords54[9];
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USHORT MultiWordDMASupport : 8; // word 63
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USHORT MultiWordDMAActive : 8;
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USHORT AdvancedPIOModes : 8;
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USHORT ReservedByte64 : 8;
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USHORT MinimumMWXferCycleTime;
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USHORT RecommendedMWXferCycleTime;
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USHORT MinimumPIOCycleTime;
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USHORT MinimumPIOCycleTimeIORDY;
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USHORT ReservedWords69[2];
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USHORT BusReleaseDelay;
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USHORT ServiceCommandDelay;
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USHORT ReservedWords73[2];
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USHORT QueueDepth : 5;
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USHORT ReservedWord75 : 11;
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USHORT ReservedWords76[4];
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USHORT MajorRevision;
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USHORT MinorRevision;
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struct {
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USHORT SmartCommands : 1;
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USHORT SecurityMode : 1;
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USHORT RemovableMedia : 1;
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USHORT PowerManagement : 1;
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USHORT PacketCommands : 1;
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USHORT WriteCache : 1;
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USHORT LookAhead : 1;
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USHORT ReleaseInterrupt : 1;
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USHORT ServiceInterrupt : 1;
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USHORT DeviceReset : 1;
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USHORT HostProtectedArea : 1;
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USHORT Obsolete1 : 1;
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USHORT WriteBuffer : 1;
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USHORT ReadBuffer : 1;
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USHORT Nop : 1;
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USHORT Obsolete2 : 1;
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USHORT DownloadMicrocode : 1;
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USHORT Reserved1 : 3;
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USHORT Msn : 1;
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USHORT PowerUpInStandby : 1;
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USHORT ManualPowerUp : 1;
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USHORT Reserved2 : 1;
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USHORT SetMax : 1;
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USHORT Reserved3 : 7;
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} CommandSetSupport;
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USHORT ReservedWord84;
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struct {
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USHORT SmartCommands : 1;
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USHORT SecurityMode : 1;
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USHORT RemovableMedia : 1;
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USHORT PowerManagement : 1;
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USHORT PacketCommands : 1;
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USHORT WriteCache : 1;
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USHORT LookAhead : 1;
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USHORT ReleaseInterrupt : 1;
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USHORT ServiceInterrupt : 1;
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USHORT DeviceReset : 1;
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USHORT HostProtectedArea : 1;
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USHORT Obsolete1 : 1;
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USHORT WriteBuffer : 1;
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USHORT ReadBuffer : 1;
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USHORT Nop : 1;
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USHORT Obsolete2 : 1;
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USHORT DownloadMicrocode : 1;
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USHORT Reserved1 : 3;
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USHORT Msn : 1;
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USHORT PowerUpInStandby : 1;
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USHORT ManualPowerUp : 1;
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USHORT Reserved2 : 1;
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USHORT SetMax : 1;
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USHORT Reserved : 7;
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} CommandSetActive;
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USHORT ReservedWord87;
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USHORT UltraDMASupport : 8; // word 88
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USHORT UltraDMAActive : 8;
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USHORT ReservedWords89[4];
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USHORT HardwareResetResult;
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USHORT ReservedWords94[32];
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USHORT AtapiZeroByteCount;
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USHORT MsnSupport : 2;
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USHORT ReservedWord127 : 14;
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USHORT SecurityStatus;
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USHORT ReservedWord129[126];
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USHORT Signature : 8;
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USHORT CheckSum : 8;
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} IDENTIFY_PACKET_DATA, *PIDENTIFY_PACKET_DATA;
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#pragma pack (pop, id_packet_data)
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//
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// Register FIS
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//
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#pragma pack (push, regfis, 1)
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typedef struct _REGISTER_FIS {
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//
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// dword 0
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//
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UCHAR FisType;
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UCHAR Reserved0 : 7;
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UCHAR CmdReg : 1;
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UCHAR Command;
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UCHAR Features;
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//
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// dword 1
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//
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UCHAR SectorNumber;
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UCHAR CylinderLow;
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UCHAR CylinderHigh;
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UCHAR DeviceHead;
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//
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// dword 2
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//
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UCHAR SectorNumberExp;
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UCHAR CylinderLowExp;
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UCHAR CylinderHighExp;
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UCHAR FeaturesExp;
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//
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// dword 3
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//
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UCHAR SectorCount;
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UCHAR SectorCountExp;
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UCHAR Reserved2;
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UCHAR Control;
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//
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// dword 4
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//
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ULONG Reserved3;
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}REGISTER_FIS, *PREGISTER_FIS;
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#pragma pack (pop, regfis)
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//
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// ATAPI specific scsiops
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//
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#define ATAPI_MODE_SENSE 0x5A
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#define ATAPI_MODE_SELECT 0x55
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#define ATAPI_LS120_FORMAT_UNIT 0x24
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//
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// IDE driveSelect register bit for LBA mode
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//
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#define IDE_LBA_MODE (1 << 6)
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//
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// IDE drive control definitions
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//
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#define IDE_DC_DISABLE_INTERRUPTS 0x02
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#define IDE_DC_RESET_CONTROLLER 0x04
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#define IDE_DC_REENABLE_CONTROLLER 0x00
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//
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// IDE status definitions
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//
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#define IDE_STATUS_ERROR 0x01
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#define IDE_STATUS_INDEX 0x02
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#define IDE_STATUS_CORRECTED_ERROR 0x04
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#define IDE_STATUS_DRQ 0x08
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#define IDE_STATUS_DSC 0x10
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#define IDE_STATUS_DRDY 0x40
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#define IDE_STATUS_IDLE 0x50
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#define IDE_STATUS_BUSY 0x80
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//
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// IDE error definitions
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//
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#define IDE_ERROR_BAD_BLOCK 0x80
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#define IDE_ERROR_CRC_ERROR IDE_ERROR_BAD_BLOCK
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#define IDE_ERROR_DATA_ERROR 0x40
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#define IDE_ERROR_MEDIA_CHANGE 0x20
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#define IDE_ERROR_ID_NOT_FOUND 0x10
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#define IDE_ERROR_MEDIA_CHANGE_REQ 0x08
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#define IDE_ERROR_COMMAND_ABORTED 0x04
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#define IDE_ERROR_END_OF_MEDIA 0x02
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#define IDE_ERROR_ILLEGAL_LENGTH 0x01
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#define IDE_ERROR_ADDRESS_NOT_FOUND IDE_ERROR_ILLEGAL_LENGTH
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//
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// IDE command definitions
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//
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#define IDE_COMMAND_NOP 0x00
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#define IDE_COMMAND_DATA_SET_MANAGEMENT 0x06
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#define IDE_COMMAND_ATAPI_RESET 0x08
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#define IDE_COMMAND_READ 0x20
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#define IDE_COMMAND_READ_EXT 0x24
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#define IDE_COMMAND_READ_DMA_EXT 0x25
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#define IDE_COMMAND_READ_DMA_QUEUED_EXT 0x26
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#define IDE_COMMAND_READ_MULTIPLE_EXT 0x29
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#define IDE_COMMAND_WRITE 0x30
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#define IDE_COMMAND_WRITE_EXT 0x34
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#define IDE_COMMAND_WRITE_DMA_EXT 0x35
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#define IDE_COMMAND_WRITE_DMA_QUEUED_EXT 0x36
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#define IDE_COMMAND_WRITE_MULTIPLE_EXT 0x39
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#define IDE_COMMAND_WRITE_DMA_FUA_EXT 0x3D
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#define IDE_COMMAND_WRITE_DMA_QUEUED_FUA_EXT 0x3E
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#define IDE_COMMAND_VERIFY 0x40
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#define IDE_COMMAND_VERIFY_EXT 0x42
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#define IDE_COMMAND_EXECUTE_DEVICE_DIAGNOSTIC 0x90
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#define IDE_COMMAND_SET_DRIVE_PARAMETERS 0x91
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#define IDE_COMMAND_ATAPI_PACKET 0xA0
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#define IDE_COMMAND_ATAPI_IDENTIFY 0xA1
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#define IDE_COMMAND_SMART 0xB0
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#define IDE_COMMAND_READ_MULTIPLE 0xC4
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#define IDE_COMMAND_WRITE_MULTIPLE 0xC5
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#define IDE_COMMAND_SET_MULTIPLE 0xC6
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#define IDE_COMMAND_READ_DMA 0xC8
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#define IDE_COMMAND_WRITE_DMA 0xCA
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#define IDE_COMMAND_WRITE_DMA_QUEUED 0xCC
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#define IDE_COMMAND_WRITE_MULTIPLE_FUA_EXT 0xCE
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#define IDE_COMMAND_GET_MEDIA_STATUS 0xDA
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#define IDE_COMMAND_DOOR_LOCK 0xDE
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#define IDE_COMMAND_DOOR_UNLOCK 0xDF
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#define IDE_COMMAND_STANDBY_IMMEDIATE 0xE0
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#define IDE_COMMAND_IDLE_IMMEDIATE 0xE1
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#define IDE_COMMAND_CHECK_POWER 0xE5
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#define IDE_COMMAND_SLEEP 0xE6
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#define IDE_COMMAND_FLUSH_CACHE 0xE7
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#define IDE_COMMAND_FLUSH_CACHE_EXT 0xEA
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#define IDE_COMMAND_IDENTIFY 0xEC
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#define IDE_COMMAND_MEDIA_EJECT 0xED
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#define IDE_COMMAND_SET_FEATURE 0xEF
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#define IDE_COMMAND_SECURITY_FREEZE_LOCK 0xF5
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#define IDE_COMMAND_NOT_VALID 0xFF
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//
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// IDE Set Transfer Mode
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//
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#define IDE_SET_DEFAULT_PIO_MODE(mode) ((UCHAR) 1) // disable I/O Ready
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#define IDE_SET_ADVANCE_PIO_MODE(mode) ((UCHAR) ((1 << 3) | (mode)))
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#define IDE_SET_SWDMA_MODE(mode) ((UCHAR) ((1 << 4) | (mode)))
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#define IDE_SET_MWDMA_MODE(mode) ((UCHAR) ((1 << 5) | (mode)))
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#define IDE_SET_UDMA_MODE(mode) ((UCHAR) ((1 << 6) | (mode)))
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//
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// Set features parameter list
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//
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#define IDE_FEATURE_ENABLE_WRITE_CACHE 0x2
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#define IDE_FEATURE_SET_TRANSFER_MODE 0x3
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#define IDE_FEATURE_ENABLE_SATA_FEATURE 0x10
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#define IDE_FEATURE_DISABLE_MSN 0x31
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#define IDE_FEATURE_DISABLE_REVERT_TO_POWER_ON 0x66
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#define IDE_FEATURE_DISABLE_WRITE_CACHE 0x82
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#define IDE_FEATURE_DISABLE_SATA_FEATURE 0x90
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#define IDE_FEATURE_ENABLE_MSN 0x95
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//
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// SATA Features Sector Count parameter list
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//
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#define IDE_SATA_FEATURE_NON_ZERO_DMA_BUFFER_OFFSET 0x1
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#define IDE_SATA_FEATURE_DMA_SETUP_FIS_AUTO_ACTIVATE 0x2
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#define IDE_SATA_FEATURE_DEVICE_INITIATED_POWER_MANAGEMENT 0x3
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#define IDE_SATA_FEATURE_GUARANTEED_IN_ORDER_DELIVERY 0x4
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#define IDE_SATA_FEATURE_ASYNCHRONOUS_NOTIFICATION 0x5
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#define IDE_SATA_FEATURE_SOFTWARE_SETTINGS_PRESERVATION 0x6
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//
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// SMART sub command list
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//
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#define IDE_SMART_READ_ATTRIBUTES 0xD0
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#define IDE_SMART_READ_THRESHOLDS 0xD1
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#define IDE_SMART_ENABLE_DISABLE_AUTOSAVE 0xD2
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#define IDE_SMART_SAVE_ATTRIBUTE_VALUES 0xD3
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#define IDE_SMART_EXECUTE_OFFLINE_DIAGS 0xD4
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#define IDE_SMART_READ_LOG 0xD5
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#define IDE_SMART_WRITE_LOG 0xD6
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#define IDE_SMART_ENABLE 0xD8
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#define IDE_SMART_DISABLE 0xD9
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#define IDE_SMART_RETURN_STATUS 0xDA
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#define IDE_SMART_ENABLE_DISABLE_AUTO_OFFLINE 0xDB
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//
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// Features for IDE_COMMAND_DATA_SET_MANAGEMENT
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//
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#define IDE_DSM_FEATURE_TRIM 0x0001 //bit 0 of WORD
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#if _MSC_VER >= 1200
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#pragma warning(pop)
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#else
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#pragma warning(default:4214)
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#endif
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#endif
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