633 lines
17 KiB
C++
633 lines
17 KiB
C++
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//
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// Created by Nick on 2019/4/7.
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//
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#include <iostream>
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#include "FpgaComm.h"
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#include <thread>
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#define LOG_TAG "FpgaComm"
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#define LOGD(...) ((void)printf(__VA_ARGS__))
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int FpgaComm::read(int addr)
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{
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unsigned char *pdata = bufRecv;
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pdata[0] = 0x03;
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pdata[1] = (unsigned char)addr;
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m_serial.Write(bufRecv, 2);
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if (m_serial.Read(bufRecv, 5, 300))
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{
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int ret = 0;
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unsigned char *pdata = (unsigned char *)(&ret);
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for (int i = 0; i < 4; i++)
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{
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pdata[i] = bufRecv[4 - i];
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}
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return ret;
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}
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return -1;
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}
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void FpgaComm::write(int addr, int data)
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{
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unsigned char *pdata = bufSend;
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pdata[0] = 0x83;
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pdata[1] = (unsigned char)addr;
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unsigned char *idata = (unsigned char *)&data;
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for (int i = 0; i < 4; i++)
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{
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pdata[6 - i] = idata[i];
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}
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m_serial.Write(bufSend, sizeof(bufSend));
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}
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void FpgaComm::updateRegs(int addr)
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{
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write(addr, fpgaParams.regs[addr]);
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}
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void FpgaComm::setFrameHeight(int height)
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{
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fpgaParams.params.frame.height = height;
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write(0x00, fpgaParams.regs[0x00]);
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}
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int FpgaComm::getFrameHeight()
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{
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// fpgaParams.params.frame.height = height;
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int reg0v = read(0x00);
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FrameFpga *frameinfo = (FrameFpga *)®0v;
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return frameinfo->height;
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}
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int FpgaComm::getAutoFrameHeight()
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{
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unsigned int val;
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unsigned int reg8 = 0;
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reg8 = read(0x08);
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val = read(14);
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int regv = val;
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val &= 0x0000ffff;
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write(0x8, reg8 & 0xfffffff7);
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std::this_thread::sleep_for(std::chrono::milliseconds(5));
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// val = read(14);
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// regv = val;
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// val &= 0x0000ffff;
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// reg8 = read(0x8);
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// LOG("TWO height = %d reg[14] = %d \n", val, regv);
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std::this_thread::sleep_for(std::chrono::milliseconds(5));
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write(0x8, reg8 | 0x8);
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return val;
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}
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void FpgaComm::setFrameNum(int num)
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{
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fpgaParams.params.frame.num = num;
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write(0x00, fpgaParams.regs[0x00]);
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}
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void FpgaComm::enableLed(bool bEnable)
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{
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fpgaParams.params.AledR.user_define.led_sample.ledEnable = bEnable;
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write(0x05, fpgaParams.regs[0x05]);
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#ifdef HAS_UV
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fpgaParams.params.BledR.user_define.led_sample.ledEnable = bEnable;
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write(0x08, fpgaParams.regs[0x08]);
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#else
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fpgaParams.params.BledR.user_define.led_sample.ledEnable = 0;
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write(0x08, fpgaParams.regs[0x08]);
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#endif
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}
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void FpgaComm::enableUV(bool enable)
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{
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#ifdef HAS_UV
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isUVEnable = enable;
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fpgaParams.params.BledR.user_define.led_sample.ledEnable = isUVEnable;
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write(0x08, fpgaParams.regs[0x08]);
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#endif
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}
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void FpgaComm::capture()
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{ // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʲô<CAB2>أ<EFBFBD>
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fpgaParams.params.cmd.cmd = 0;
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write(0x02, fpgaParams.regs[0x02]);
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fpgaParams.params.cmd.cmd = 1;
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write(0x02, fpgaParams.regs[0x02]);
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}
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int FpgaComm::getRegs(int addr)
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{
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return fpgaParams.regs[addr];
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}
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void FpgaComm::setRegs(int addr, int value)
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{
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fpgaParams.regs[addr] = value;
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write(addr, value);
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}
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FpgaComm::FpgaComm() : fanGpio(FAN_PORT) // <20><>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ
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{
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m_serial.Open(com.c_str(), bauds);
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// for(int i = 0; i < MAX_REGS; i++){
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// fpgaParams.regs[i] = read(i);
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// LOG("reg[%d] = 0x%08x \n", i, fpgaParams.regs[i]);
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// }
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fpgaParams.params.AledR.user_define.led_sample.sample = 256;
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updateRegs(0x05);
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enableLed(true);
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}
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void FpgaComm::updateRegs()
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{
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for (int i = 0x05; i < MAX_REGS; i++)
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{
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updateRegs(i);
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}
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fpgaParams.params.AledR.user_define.led_sample.sample = 256;
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updateRegs(0x05);
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}
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void FpgaComm::setAGain(int indexGain, int value)
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{
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AdGain adGain;
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adGain.value = value;
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indexGain++;
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fpgaParams.params.Aad.bits.ad0_addr = indexGain * 2;
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fpgaParams.params.Aad.bits.ad1_addr = fpgaParams.params.Aad.bits.ad0_addr + 1;
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fpgaParams.params.Aad.bits.ad0_value = adGain.gain_value.gain_low8;
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fpgaParams.params.Aad.bits.ad1_value = adGain.gain_value.gain_hight;
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fpgaParams.params.Aad.bits.ad0_rw = 0;
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fpgaParams.params.Aad.bits.ad1_rw = 0;
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updateRegs(0x04);
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fpgaParams.params.mode.adcA = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcA = 0;
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updateRegs(0x01);
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}
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void FpgaComm::getAGain(int indexGain, int &Avalue, int &Bvalue)
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{
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AdGain adGain;
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CisAdGain adgain;
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// adGain.value = value;
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indexGain++;
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fpgaParams.params.Aad.bits.ad0_addr = indexGain * 2;
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fpgaParams.params.Aad.bits.ad1_addr = fpgaParams.params.Aad.bits.ad0_addr + 1;
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fpgaParams.params.Aad.bits.ad0_value = 0;
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fpgaParams.params.Aad.bits.ad1_value = 0;
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fpgaParams.params.Aad.bits.ad0_rw = 0;
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fpgaParams.params.Aad.bits.ad1_rw = 0;
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updateRegs(0x04);
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fpgaParams.params.mode.adcA = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcA = 0;
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updateRegs(0x01);
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auto ret = read(0x03);
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adgain.value = ret;
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Avalue = adgain.bits.ad0_value;
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Bvalue = adgain.bits.ad1_value;
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}
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void FpgaComm::setBGain(int indexGain, int value)
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{
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AdGain adGain;
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adGain.value = value;
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indexGain++;
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fpgaParams.params.Bad.bits.ad0_addr = indexGain * 2;
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fpgaParams.params.Bad.bits.ad1_addr = indexGain * 2 + 1;
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fpgaParams.params.Bad.bits.ad0_value = adGain.gain_value.gain_low8;
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fpgaParams.params.Bad.bits.ad1_value = adGain.gain_value.gain_hight;
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fpgaParams.params.Bad.bits.ad0_rw = 0;
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fpgaParams.params.Bad.bits.ad1_rw = 0;
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updateRegs(0x07);
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fpgaParams.params.mode.adcB = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcB = 0;
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updateRegs(0x01);
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}
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void FpgaComm::getBGain(int indexGain, int &Avalue, int &Bvalue)
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{
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AdGain adGain;
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CisAdGain adgain;
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// adGain.value = value;
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indexGain++;
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fpgaParams.params.Bad.bits.ad0_addr = indexGain * 2;
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fpgaParams.params.Bad.bits.ad1_addr = indexGain * 2 + 1;
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fpgaParams.params.Bad.bits.ad0_value = adGain.gain_value.gain_low8;
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fpgaParams.params.Bad.bits.ad1_value = adGain.gain_value.gain_hight;
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fpgaParams.params.Bad.bits.ad0_rw = 1;
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fpgaParams.params.Bad.bits.ad1_rw = 1;
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updateRegs(0x07);
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fpgaParams.params.mode.adcB = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcB = 0;
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updateRegs(0x01);
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auto ret = read(0x03);
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adgain.value = ret;
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Avalue = adgain.bits.ad0_value;
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Bvalue = adgain.bits.ad1_value;
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}
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void FpgaComm::setAOffset(int indexOffset, int value)
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{
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fpgaParams.params.Aad.bits.ad0_rw = 0;
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fpgaParams.params.Aad.bits.ad1_rw = 0;
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fpgaParams.params.Aad.bits.ad0_addr = indexOffset + 0x0e;
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fpgaParams.params.Aad.bits.ad1_addr = 0x14;
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fpgaParams.params.Aad.bits.ad1_value = 0x50;
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fpgaParams.params.Aad.bits.ad0_value = value;
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updateRegs(0x04);
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fpgaParams.params.mode.adcA = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcA = 0;
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updateRegs(0x01);
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}
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void FpgaComm::getAOffset(int indexGain, int &Avalue, int &Bvalue)
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{
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fpgaParams.params.Aad.bits.ad0_rw = 1;
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fpgaParams.params.Aad.bits.ad1_rw = 1;
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fpgaParams.params.Aad.bits.ad0_addr = indexGain + 0x0e;
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fpgaParams.params.Aad.bits.ad1_addr = 0x14;
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fpgaParams.params.Aad.bits.ad1_value = 0x50;
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fpgaParams.params.Aad.bits.ad0_value = 0;
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updateRegs(0x04);
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fpgaParams.params.mode.adcA = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcA = 0;
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updateRegs(0x01);
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CisAdGain adgain;
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auto ret = read(0x03);
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adgain.value = ret;
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Avalue = adgain.bits.ad0_value;
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Bvalue = adgain.bits.ad1_value;
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}
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void FpgaComm::setBOffset(int indexOffset, int value)
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{
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fpgaParams.params.Bad.bits.ad0_rw = 0;
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fpgaParams.params.Bad.bits.ad1_rw = 0;
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fpgaParams.params.Bad.bits.ad0_addr = indexOffset + 0x0e;
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fpgaParams.params.Bad.bits.ad1_addr = 0x14;
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fpgaParams.params.Aad.bits.ad1_value = 0x50;
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fpgaParams.params.Bad.bits.ad0_value = value;
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updateRegs(0x07);
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fpgaParams.params.mode.adcB = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcB = 0;
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updateRegs(0x01);
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}
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void FpgaComm::getBOffset(int indexGain, int &Avalue, int &Bvalue)
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{
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fpgaParams.params.Bad.bits.ad0_rw = 1;
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fpgaParams.params.Bad.bits.ad1_rw = 1;
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fpgaParams.params.Bad.bits.ad0_addr = indexGain + 0x0e;
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fpgaParams.params.Bad.bits.ad1_addr = 0x14;
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fpgaParams.params.Aad.bits.ad1_value = 0x50;
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fpgaParams.params.Bad.bits.ad0_value = 0;
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updateRegs(0x07);
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fpgaParams.params.mode.adcB = 1;
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updateRegs(0x01);
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fpgaParams.params.mode.adcB = 0;
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updateRegs(0x01);
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CisAdGain adgain;
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auto ret = read(0x03);
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adgain.value = ret;
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Avalue = adgain.bits.ad0_value;
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Bvalue = adgain.bits.ad1_value;
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}
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void FpgaComm::setAExposureR(int value)
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{
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fpgaParams.params.AledR.ledR = value;
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updateRegs(0x05);
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fpgaParams.regs[0x05] = read(0x05);
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}
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void FpgaComm::setAExposureG(int value)
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{
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fpgaParams.params.AledGB.bits.ledG = value;
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updateRegs(0x06);
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fpgaParams.regs[0x06] = read(0x06);
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}
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void FpgaComm::setAExposureB(int value)
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{
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fpgaParams.params.AledGB.bits.ledB = value;
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updateRegs(0x06);
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fpgaParams.regs[0x06] = read(0x06);
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}
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void FpgaComm::setAExposureUV(int value)
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{
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#ifdef HAS_UV
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fpgaParams.params.UVLed.bits.ledASide = value;
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updateRegs(0x0d);
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fpgaParams.regs[0x0d] = read(0x0d);
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#endif
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}
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void FpgaComm::setBExposureR(int value)
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{
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fpgaParams.params.BledR.ledR = value;
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updateRegs(0x08);
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fpgaParams.regs[0x08] = read(0x08);
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}
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void FpgaComm::setBExposureG(int value)
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{
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fpgaParams.params.BledGB.bits.ledG = value;
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updateRegs(0x09);
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fpgaParams.regs[0x09] = read(0x09);
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}
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void FpgaComm::setBExposureB(int value)
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{
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fpgaParams.params.BledGB.bits.ledB = value;
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updateRegs(0x09);
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fpgaParams.regs[0x09] = read(0x09);
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}
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void FpgaComm::setBExpousreUV(int value)
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{
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#ifdef HAS_UV
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fpgaParams.params.UVLed.bits.ledBSide = value;
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updateRegs(0x0d);
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fpgaParams.regs[0x0d] = read(0x0d);
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#endif
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}
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void FpgaComm::setEnTestCol(bool en)
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{
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fpgaParams.params.AledR.user_define.led_sample.en_test_color = en ? 1 : 0;
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updateRegs(0x05);
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fpgaParams.regs[0x05] = read(0x05);
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}
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void FpgaComm::setEnTestBit(bool en)
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{
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|||
|
fpgaParams.params.AledR.user_define.led_sample.en_test = en ? 1 : 0;
|
|||
|
updateRegs(0x05);
|
|||
|
fpgaParams.regs[0x05] = read(0x05);
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setFanMode(int mode)
|
|||
|
{
|
|||
|
fanGpio.setValue(mode == 3 ? Gpio::Low : Gpio::High);
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setSp(int value)
|
|||
|
{
|
|||
|
setRegs(0x01, value);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getSp()
|
|||
|
{
|
|||
|
return fpgaParams.params.mode.sp;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setColorMode(int mode)
|
|||
|
{
|
|||
|
fpgaParams.params.mode.colorMode = mode;
|
|||
|
updateRegs(0x01);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getColorMode()
|
|||
|
{
|
|||
|
return fpgaParams.params.mode.colorMode;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setSample(int sample)
|
|||
|
{
|
|||
|
fpgaParams.params.mode.sample = sample;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.AledR.user_define.led_sample.sample = sample;
|
|||
|
updateRegs(0x05);
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::EnableTest(bool bTest)
|
|||
|
{
|
|||
|
fpgaParams.params.mode.selftest = bTest;
|
|||
|
updateRegs(0x01);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::IsTest()
|
|||
|
{
|
|||
|
return fpgaParams.params.mode.selftest;
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getSample()
|
|||
|
{
|
|||
|
return fpgaParams.params.mode.sample;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setDpi(int dpi)
|
|||
|
{
|
|||
|
fpgaParams.params.mode.dpi = dpi;
|
|||
|
updateRegs(0x01);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getDpi()
|
|||
|
{
|
|||
|
return fpgaParams.params.mode.dpi;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setSample(int sampleFront, int sampleBack)
|
|||
|
{
|
|||
|
fpgaParams.params.mode.sample = sampleFront;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.AledR.user_define.led_sample.sample = sampleBack;
|
|||
|
updateRegs(0x05);
|
|||
|
}
|
|||
|
|
|||
|
// 20190626 YHP autoTrig function
|
|||
|
void FpgaComm::setTrigMode(bool isArmMode)
|
|||
|
{
|
|||
|
int tmp = read(0x0b);
|
|||
|
if (!isArmMode)
|
|||
|
{ // default value+ ARM MODE,bit27 =0;
|
|||
|
fpgaParams.params.TrigMode = tmp & 0XFBFFFFFF;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
fpgaParams.params.TrigMode = tmp | (1 << 26);
|
|||
|
}
|
|||
|
updateRegs(0x0b);
|
|||
|
}
|
|||
|
|
|||
|
// void FpgaComm::setDelayTime(int value) {
|
|||
|
// // fpgaParams.params.DelayTime = value;
|
|||
|
// // updateRegs(0x0C);
|
|||
|
// }
|
|||
|
void FpgaComm::setFrame_interval_min(int min)
|
|||
|
{
|
|||
|
fpgaParams.params.FrameInterval.Frame_Interval_min = min;
|
|||
|
fpgaParams.params.FrameInterval.reversed = 0;
|
|||
|
updateRegs(0xc);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getFrame_interval_min()
|
|||
|
{
|
|||
|
fpgaParams.params.FrameInterval.reversed = 0;
|
|||
|
auto value = read(0x0c);
|
|||
|
fpgaParams.params.FrameInterval = *(CisFrameInterval *)&value;
|
|||
|
return fpgaParams.params.FrameInterval.Frame_Interval_min;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setFrame_interval_max(int max)
|
|||
|
{
|
|||
|
fpgaParams.params.FrameInterval.Frame_Interval_max = max;
|
|||
|
fpgaParams.params.FrameInterval.reversed = 0;
|
|||
|
updateRegs(0xc);
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getFrame_interval_max()
|
|||
|
{
|
|||
|
fpgaParams.params.FrameInterval.reversed = 0;
|
|||
|
auto value = read(0x0c);
|
|||
|
fpgaParams.params.FrameInterval = *(CisFrameInterval *)&value;
|
|||
|
return fpgaParams.params.FrameInterval.Frame_Interval_max;
|
|||
|
}
|
|||
|
|
|||
|
// <20><><EFBFBD>¼Ĵ<C2BC><C4B4><EFBFBD><EFBFBD><EFBFBD>Ϣ
|
|||
|
void FpgaComm::update()
|
|||
|
{
|
|||
|
for (int i = 0; i < MAX_REGS; i++)
|
|||
|
{
|
|||
|
fpgaParams.regs[i] = read(i);
|
|||
|
LOG("reg[%d] = 0x%08x \n", i, fpgaParams.regs[i]);
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::enableJamCheck(bool b)
|
|||
|
{
|
|||
|
// fpgaParams.params.BledR.user_define.led_sample.jamEnable = b;
|
|||
|
// updateRegs(0x08);
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::resetADC()
|
|||
|
{
|
|||
|
fpgaParams.params.Aad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad0_addr = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad0_value = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_addr = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_value = 0;
|
|||
|
updateRegs(0x04);
|
|||
|
fpgaParams.params.mode.adcA = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcA = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.Bad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad0_addr = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad0_value = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_addr = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_value = 0;
|
|||
|
updateRegs(0x07);
|
|||
|
fpgaParams.params.mode.adcB = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcB = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
std::this_thread::sleep_for(std::chrono::milliseconds(100));
|
|||
|
fpgaParams.params.Aad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad0_addr = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad0_value = 7;
|
|||
|
fpgaParams.params.Aad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_addr = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_value = 7;
|
|||
|
updateRegs(0x04);
|
|||
|
fpgaParams.params.mode.adcA = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcA = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.Bad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad0_addr = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad0_value = 7;
|
|||
|
fpgaParams.params.Bad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_addr = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_value = 7;
|
|||
|
updateRegs(0x07);
|
|||
|
fpgaParams.params.mode.adcB = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcB = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.Aad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad0_addr = 1;
|
|||
|
fpgaParams.params.Aad.bits.ad0_value = 0x50;
|
|||
|
fpgaParams.params.Aad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Aad.bits.ad1_addr = 1;
|
|||
|
fpgaParams.params.Aad.bits.ad1_value = 0x50;
|
|||
|
updateRegs(0x04);
|
|||
|
fpgaParams.params.mode.adcA = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcA = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.Bad.bits.ad0_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad0_addr = 1;
|
|||
|
fpgaParams.params.Bad.bits.ad0_value = 0x50;
|
|||
|
fpgaParams.params.Bad.bits.ad1_rw = 0;
|
|||
|
fpgaParams.params.Bad.bits.ad1_addr = 1;
|
|||
|
fpgaParams.params.Bad.bits.ad1_value = 0x50;
|
|||
|
updateRegs(0x07);
|
|||
|
fpgaParams.params.mode.adcB = 1;
|
|||
|
updateRegs(0x01);
|
|||
|
fpgaParams.params.mode.adcB = 0;
|
|||
|
updateRegs(0x01);
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::setVsp(unsigned int Aside, unsigned int BSide)
|
|||
|
{
|
|||
|
// auto ret = read(13);
|
|||
|
CISVSP vsp; // = *(CISVSP*)&ret;
|
|||
|
vsp.bits.ASide_VSP = Aside;
|
|||
|
vsp.bits.BSide_VSP = BSide;
|
|||
|
vsp.bits.reserved = 0;
|
|||
|
printf("setVsp A side =%d B side=%d vspint=%08x \n", vsp.bits.ASide_VSP, vsp.bits.BSide_VSP, vsp.value);
|
|||
|
write(13, vsp.value);
|
|||
|
}
|
|||
|
|
|||
|
unsigned int FpgaComm::getFrame_counter_val()
|
|||
|
{
|
|||
|
int crt_frame_count=0;
|
|||
|
unsigned int reg8 = 0;
|
|||
|
|
|||
|
reg8 = read(8);
|
|||
|
//write(8,reg8 & 0x8);
|
|||
|
std::this_thread::sleep_for(std::chrono::milliseconds(10));
|
|||
|
write(8, reg8 & 0xfffffff7);//off stop snap
|
|||
|
reg8 = read(8);
|
|||
|
std::this_thread::sleep_for(std::chrono::milliseconds(10));
|
|||
|
crt_frame_count = read(0x10);
|
|||
|
|
|||
|
if(crt_frame_count <= 0)//读取失败或帧数为0的情况下,多读几次
|
|||
|
{
|
|||
|
for(int i = 0;i<3;i++)
|
|||
|
{
|
|||
|
crt_frame_count = read(0x10);
|
|||
|
printf("try %d times read frame count,frame_count = %d \n",i,crt_frame_count);
|
|||
|
if(crt_frame_count > 0)
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
write(8, reg8 | 0x8);// on reset counter
|
|||
|
std::this_thread::sleep_for(std::chrono::milliseconds(2));
|
|||
|
//printf("TWO height reg[14] = %d reg[16] = %d \n", read(14) & 0xffff,read(16));
|
|||
|
return crt_frame_count;
|
|||
|
}
|
|||
|
|
|||
|
int FpgaComm::getFrameNum(){
|
|||
|
return fpgaParams.params.frame.num;
|
|||
|
}
|
|||
|
|
|||
|
void FpgaComm::set_cis_type(bool isA3_CIS)
|
|||
|
{
|
|||
|
fpgaParams.params.AledR.user_define.led_sample.cis_type = isA3_CIS?1:0;
|
|||
|
}
|